SoC Design Verification Lead
Company: Velaura AI, Inc.
About the Role
You will own the SoC verification strategy, plan, architecture, and execution. You will lead verification engineers, coordinate system-level verification areas, drive coverage closure and tape-out readiness, report risk, and partner on simulation, emulation, and pre-silicon bring-up.
Requirements
•Twelve or more years in design verification with significant SoC-level experience
•Experience leading SoC verification through sign-off and tape-out
•Experience building and leading a verification team
•Experience with SystemVerilog, UVM, C, C++, and coverage-driven verification
•Experience managing simulation flows on ARM or RISC-V SoCs
•Knowledge of PCIe and LPDDR5 or LPDDR6
•Experience verifying boot, root of trust, clock and reset topology, and low-power behavior
•Experience with CDC, RDC, and UPF-based flows
•Communication skills and ability to influence engineering leaders
Responsibilities
•Own the SoC-level verification strategy, plan, and execution
•Build and lead a team of SoC verification engineers
•Define the SoC verification architecture and environment
•Coordinate verification across boot, security, clock, reset, low power, IO, and memory subsystems
•Define sign-off criteria and coverage goals and drive closure through tape-out
•Track and report verification progress, coverage, and risk
•Work on system-level correctness and pre-silicon bring-up
•Partner on simulation, emulation, and regression capacity
Benefits
•Equity compensation
•Medical coverage
•Dental coverage
•Vision coverage
•Paid time off
•Flexible work arrangements
