# Job Details
Job Description:
The Role and Impact
Join Intel as a Silicon Packaging Design Engineer, where you will be at the forefront of semiconductor innovation, driving the end-to-end development of cutting-edge substrate designs. In this role, you will perform substrate fit and routing studies to optimize performance, cost, and manufacturability while collaborating with customers and internal teams. Your contributions will directly impact the creation of Intel's advanced silicon packaging solutions, ensuring they meet electrical and manufacturing requirements.
Business Group
At Intel, the Assembly and Test Technology Development (ATTD) Design group plays a crucial role in advancing the company's semiconductor packaging technologies. This team focuses on optimizing silicon-package-board performance, driving innovations in substrate design, and supporting Intel's overall mission of delivering world-class computing solutions. By joining this group, you'll be part of a collaborative environment that empowers innovation and technical excellence.
Key Responsibilities
•Develop physical layout designs for silicon packages, assembly test chips, and Intel's EMIB (Embedded Multi-die Interconnect Bridge) technologies.
•Collaborate with customers and electrical engineers to optimize signal integrity and power delivery.
•Create bump patterns and placements while adhering to design rule requirements.
•Perform signal routing planning and power grid placement to meet electrical and manufacturing standards.
•Conduct various layout verification processes, including routing checks, connectivity validation, DRC (Design Rule Check), and electromigration analysis.
•Provide feedback on feasibility studies and implement customer enhancement requests.
•Resolve design and methodology challenges related to layout design tools and workflows.
•Document design processes and maintain collateral in product lifecycle management systems.
Qualifications
Minimum Qualifications:
•Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a STEM-related field with 1-6 years of hands-on experience in silicon packaging design, demonstrated through academic projects, internships, coursework, or training OR a Master's degree in a related field with no prior professional experience.
•Proficiency in EDA tools such as Cadence or Siemens for package/PCB design.
•Familiarity with programming languages such as Python, Perl, Linux, and/or SKILL.
•Strong understanding of electrical field theories and electronic fundamentals.
Preferred Qualifications:
•Excellent written and verbal communication skills.
•Attention to detail and a customer-oriented mindset.
•Highly motivated and results-driven with a passion for innovation.
Job Type
Experienced Hire
Shift
Shift 1 (India)
Primary Location
India, Bangalore
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
