Intel

Graduate Talent (CPU-SoC Silicon Design)

In short

Graduate role at Intel in Penang, Malaysia, focused on CPU/SoC silicon design covering RTL validation, VLSI structural physical design, analog IP development, and third-party IP integration for next-generation SoC products. Requires a Bachelor's or Master's degree in Electronic, Electrical or Computer Engineering, with familiarity in VLSI/CMOS design, UNIX, C programming and CAD tools. Hybrid work model split between on-site (Penang/Kulim) and off-site work, hired as an Intel Contract Employee.

Job Description
In this position, you will be involved in the training, design and development of next generation SOC/CPU for a wide range of Intel products. Your responsibilities will include some of the following but not limited to:
•Assist design unit owner in Register Transfer Level (RTL) model functional validation. Use CAD tool extensively to simulate logic behavior and circuit performance and direction of physical design for next generation, deep sub-micron embedded circuit solutions. Verify the circuit behavior against the original simulation model and first silicon.
•Define VLSI Structural Design methodology and developing design flows. Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration. Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power.
•Develop Analog IP on next generation deep submicron process for the Intel's SOC, perform tasks related to Very-large-scale integration (VLSI) complementary metal-oxide-semiconductor (CMOS) IC design, Solid state physics and physical layout. Such tasks may include: Circuit design of high speed clocking related circuits (phase-locked loop PLL, delay-locked loop DLL, bandgap) or high voltage input/output IO (double data rate DDR/LPDDR, General-purpose input/output GPIO, OPIO).
•Responsible for Integration of Third party IPs -- Synthesis, functional and/or timing convergence, and pre and post-si debug of IPs developed by various external vendors as well as within the company. Handling of signals crossing power planes and clock domains, industry standard protocols including hardware and software details dealing with Memory LPDDR, storage eMMC, SATA, UFS, peripherals PCIe, USB, and MIPI interfaces in SOC devices. System integration dealing with Si/Platform/FW/MW/drivers/OS/Apps on Android and Windows-based tablets and phones.
Qualifications
You must possess a Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering.
Additional qualifications include:
•Familiarity with Very Large Scale Integration (VLSI) Complementary Metal-Oxide Semiconductor (CMOS) logic circuit design
•Well versed in UNIX, C programming and relevant Computer Aided Design (CAD) tools.
Job Type
Intel Contract Employee
Shift
Shift 1 (Malaysia)
Primary Location
Malaysia, Penang
Additional Locations
Malaysia, Kulim
Work Model
This role will be eligible for Intel's hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
Position of Trust
N/A

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