Intel

E-Core (Atom) CPU Layout Design Engineer

In short

Intel is hiring an E-Core (Atom) CPU Layout Design Engineer in Penang, Malaysia, to work on the physical design of future-generation Intel Atom microprocessors, including memory compilers, custom IP blocks, and layout partitions. The role involves driving complex digital physical design assignments, collaborating with circuit design and CAD teams, and partnering with SoC and cross-site design groups. Requires a Bachelor's or Master's degree in a relevant engineering field, 3+ years of layout design experience, VLSI/CMOS familiarity, and UNIX shell/TCL/Perl scripting skills. The role is hybrid, splitting time between on-site and off-site work.

Job Description
As an E-Core (Atom) CPU Layout Design Engineer, you will be part of a highly skilled team responsible for the design of future generation, high-performance Intel Atom microprocessors. In this role, you will drive the physical implementation of a variety of memory compilers, custom IP blocks, and layout partitions that directly support Intel's CPU products.
You will work in a dynamic environment where design challenges are complex, assignments are broadly defined, and solutions often require creativity, deep technical knowledge, and strong problem-solving skills.
Responsibilities
Your responsibilities will include, but will not be limited to:
•Independently assess and drive complex digital physical design assignments across multiple design stages.
•Work closely with circuit design engineers to interpret schematics and drive physical implementation.
•Work interactively and proactively with our CAD team to debug tool functionality and bugs.
•Build and verify all levels of physical design hierarchy from leaf-level cell layout to block-level and top-level integration.
•Partnering with SoC teams and cross site design groups to ensure alignment, reuse, and consistency across projects.
In addition to the qualifications below the ideal candidate will also have the following:
•Excellent verbal and written communication skills.
•Excellent interpersonal skills.
•Prioritization and multitasking skills.
•Good analytical and problem-solving skills.
Qualifications
Minimum Qualifications:
•Candidate must possess a Bachelor's or Master's degree in Electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline.
•3+ years of experience in layout design.
Additional qualifications include:
•Less than 2 years of experience in layout design for grade 3.
•Familiarity with Very Large Scale of Integration (VLSI) and Complementary Metal-Oxide Semiconductor (CMOS) logic circuit design.
•Proficient programming skills: UNIX shell script, TCL, Perl.
Job Details
•Job Type: Experienced Hire
•Shift: Shift 1 (Malaysia)
•Primary Location: Malaysia, Penang
•Additional Locations: Malaysia, Kulim
Work Model
This role will be eligible for the hybrid work model, which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location, or time type) are subject to change.

Stop applying.
Get referred.

$10 in free credits

In just 60 seconds, fully on autopilot — Eraldt's AI agents read your CV, map the roles you fit, find live vacancies and the people who can refer you, write personal emails, and get you referred.

This isn't an application: your CV doesn't go to the company, and we don't promise a referral for this exact role.

Discover who else lands interviews on autopilot