Job Description
The Role and Impact
As a Layout Design Engineer, you will play a critical role in the physical implementation of next-generation high-performance Intel Atom microprocessors. Your day-to-day responsibilities will include driving the design of memory compilers, custom IPs, and partitions that support CPU products. Your contributions will directly impact the efficiency and performance of Intel's cutting-edge technologies used globally.
Business Group
You will join Intel Corporation's ATOM GDC Physical Design organization, which focuses on delivering innovative and efficient physical design solutions for Intel Atom microprocessors. This group supports Intel's broader mission to create world-class semiconductor products that empower cutting-edge computing technologies.
Responsibilities will include but are not limited to
•Perform and drive complex physical design assignments independently, ensuring best practices and high efficiency.
•Collaborate closely with circuit design engineers to interpret schematics and enable successful physical implementation.
•Lead physical design efforts ranging from leaf-level cell design to full partition integration.
•Assess and implement solutions for custom IPs and memory compilers to support high-performance CPU products.
•Develop and optimize layout scripts, macros, and tools to enhance design implementation workflows.
•Work collaboratively with cross-functional teams across various Intel sites to align on design objectives.
The ideal candidate should show the following behavioral traits:
•Good English communication skills.
Qualifications
Minimum qualifications are required to be initially considered for this position.
•Bachelor's degree in Electronics, Microelectronics Engineering, Computer Engineering, or a related engineering discipline.
•6+ months of hands-on experience in:
•Layout design (experience could be obtained through a combination of relevant industry job experience, internship experience and/or schoolwork/classes/research).
•Industry-standard layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar software.
•Advanced English level.
•Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
•Master's degree in Electronics, Microelectronics Engineering, Computer Engineering, or a related engineering discipline.
•1+ years of experience or familiarity with Very Large-Scale Integration (VLSI) or Complementary Metal-Oxide-Semiconductor (CMOS) logic circuit design.
•Practical knowledge of Unix/Linux operating systems.
Requirements listed would be obtained through a combination of relevant industry job experience, internship experience and/or schoolwork/classes/research.
Job Type: Experienced Hire
Shift: Shift 1 (Mexico)
Primary Location: Mexico, Guadalajara
Work Model for this Role: This role will require an on-site presence.
