Job Description
What if you could help define how developers program an entirely new class of AI hardware?
For nearly a decade, Intel's Neuromorphic Computing Lab, together with a global ecosystem of more than 250 research groups, has advanced architectures, algorithms, and software inspired by the brain's remarkable efficiency, scalability, and adaptability. Our Loihi research chips pioneered event-driven, sparse, and massively parallel neuro-inspired computing, contributing to more than 100 peer-reviewed publications and establishing the potential of this new approach.
Now we are taking the next step: transforming those breakthroughs into technologies for physical AI systems, such as robots and intelligent edge devices that must sense, decide, and act under tight latency and power constraints. This is an opportunity to join at a formative stage and help create the kernels, programming abstractions, and performance models for a new hardware architecture built around sparse, event-driven, and massively parallel computation. Your work will directly influence both the hardware and how developers use it. You will also help shape a software stack designed for an era in which engineers and AI agents build and optimize applications together.
Position Overview
As an AI Software Engineer in Neuromorphic Computing, you will turn new neuromorphic hardware capabilities into working, high-performance AI software and contribute to critical technical areas from design through delivery. You will build specialized kernels for current and next-generation neuromorphic hardware, explore optimization strategies that conventional processors cannot offer, and help shape the programming abstractions that expose those capabilities to developers.
Working alongside hardware architects, compiler engineers, and AI researchers, you will use performance and power models to influence design decisions before silicon is available and then validate those decisions using simulators, emulators, and hardware. Your work will span the full hardware-software lifecycle, from modeling a hardware feature to implementing the kernel that unlocks it and demonstrating measurable gains on real AI workloads. You will contribute to the training, porting, and optimization of end-to-end applications for Loihi-based systems while helping improve engineering quality across the team.
As part of Intel's CTO Office, you will join a vertically integrated incubation effort dedicated to bringing Intel's neuromorphic technology innovations to market. Our diverse team of engineers and researchers has pioneered sparse, event-based neuromorphic architectures across multiple generations and is now focused on commercializing the technology in future Intel and partner products.
Responsibilities
The primary responsibilities for this role will include, but are not limited to:
•Design and implement specialized AI kernels for neuromorphic hardware using custom DSLs and accelerator programming models such as CUDA and SYCL and help shape the programming abstractions for Intel's next-generation neuromorphic architecture.
•Develop and optimize operations for convolutional networks, transformers, and generative AI workloads by applying techniques such as tiling, fusion, vectorization, parallelization, layout transformation, buffering, sparsity, and quantization.
•Develop performance methodologies and improve kernel behavior in areas such as compute utilization, latency, throughput, memory bandwidth, data movement, synchronization, and scaling, turning architectural insights into measurable workload gains.
•Build reference models, numerical validation tools, benchmarks, and analytical or simulation-based performance, power, and area models that guide hardware-software co-design; reconcile discrepancies across models, simulators, emulators, and hardware.
•Collaborate with hardware, compiler, runtime, and application engineers to deliver maintainable code, tests, documentation, benchmarks, and performance-regression infrastructure.
Qualifications
Minimum Qualifications:
Minimum qualifications are required to be initially considered for this position.
•A PhD with no prior professional experience, a master's degree with 2+ years of relevant experience, or a bachelor's degree with 4+ years of relevant experience in Computer Science, Electrical Engineering, Computer Engineering, Applied Mathematics, Physics, or a related technical field.
•4+ years of experience developing, debugging, and delivering maintainable software in Python and either C or C++, including performance-critical or systems-level code.
•2+ years of experience implementing and optimizing numerical, machine-learning, or high-performance computing kernels using parallel programming and either an accelerator programming model, such as CUDA, SYCL, or OpenCL, or a domain-specific language, such as Triton.
•2+ years of experience developing, training, or evaluating AI algorithms and machine-learning models using a framework such as PyTorch, JAX, or TensorFlow.
•2+ years of experience establishing numerical correctness and measuring performance using reference implementations, automated testing, benchmarking, profiling, or performance-regression infrastructure.
Preferred Qualifications:
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
•Experience developing or optimizing workloads based on convolutional networks, transformers, generative AI, or other models relevant to edge and physical AI systems.
•Experience with compiler technologies or domain-specific language development, such as MLIR, LLVM, TVM, Triton, or related toolchains.
•Experience with hardware performance modeling, architecture simulators, performance, power, and area (PPA) analysis, or hardware-software co-design.
•Advanced experience with optimization techniques including kernel fusion, tiling, vectorization, quantization, sparsity, layout optimization, or double buffering.
•Experience developing software for spatial, dataflow, neuromorphic, or other emerging AI accelerator architectures.
•Experience contributing to collaborative or open-source software projects using code review, continuous integration, documentation, and testing practices.
Job Type
College Grad
Shift
Shift 1 (United States of America)
Primary Location
US, California, Santa Clara
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
Annual Salary Range for jobs which could be performed in the US: $170,500.00–240,710.00 USD. The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
