NXP

Principal SoC Verification Engineer

In short

This role drives end-to-end verification of next-generation automotive SoCs for safety-critical applications, covering planning, testbench development, execution, debug, and sign-off. The employer is NXP, a semiconductor company, and the work involves SystemVerilog/UVM verification environments for ARM-based SoC features like interconnects, DDR, PCIe, Ethernet, security, boot, low power, and functional safety (ISO 26262). It demands strong SystemVerilog, UVM, SVA, coverage closure, and simulation/debug tool expertise (VCS, Xcelium, Verdi), plus experience with ARM-based SoCs and industry protocols.

Role Overview
We are looking for an experienced SoC Verification Engineer to drive verification of next-generation automotive SoCs used in safety-critical applications. The role involves end-to-end ownership of verification planning, testbench development, execution, debug, and sign-off for complex SoC platforms.
Key Responsibilities
•Develop and execute SoC verification plans and strategies.
•Build and maintain SystemVerilog/UVM based verification environments.
•Verify complex SoC features including:
•ARM-based subsystems
•Interconnects (AXI/ACE/CHI)
•DDR, PCIe, Ethernet, Security, and Boot
•Low Power and Clock/Reset architectures
•Functional Safety mechanisms (ISO 26262)
•Drive functional, code, and assertion coverage closure.
•Debug RTL, testbench, and system-level issues.
•Collaborate with Architecture, Design, Firmware, Validation, and Safety teams.
•Support post-silicon debug and customer issue resolution.
Required Qualifications
•Bachelor's or Master's degree in EE, CE, CS, or related field.
•5-4 years of experience in SoC/IP verification.
•Strong expertise in:
•SystemVerilog, UVM, SVA
•Functional and code coverage
•Simulation and debug tools (VCS, Xcelium, Verdi)
•Experience with ARM-based SoCs and industry-standard protocols (AXI, PCIe, DDR, Ethernet).
•Strong debugging and problem-solving skills.
Preferred Qualifications
•Automotive SoC experience.
•Knowledge of ISO 26262 Functional Safety.
•Experience with Low Power (UPF), Formal Verification, GLS, and Emulation.
•Experience leading technical initiatives and mentoring engineers.

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