NXP

SRAM/ROM Circuit Design Engineer

In short

NXP's Austin Memories team seeks an experienced SRAM/ROM memory circuit design engineer to design CMOS memory circuits and compiler leaf cells, run simulation characterization, and collaborate with layout, CAD, and modeling/verification teams. The role requires 8+ years (6+ with Master's) of SRAM memory circuit design experience, including advanced CMOS process nodes at 5nm and below, strong Cadence Virtuoso skills, and scripting in Perl, tcl, or Python. Based in Austin, Texas, with at least 3 days/week in office.

About the Team
NXP's Austin Memories team is seeking an experienced memory circuit design engineer for our SRAM and ROM internal memory compiler designs.
Our team is part of the Design Enablement/Foundation IP organization within the Chief Technology Office at NXP. We provide differentiating SRAM/ROM memory compiler solutions to NXP SoC design teams across multiple business lines - your work will have real impact for our design teams and, through them, our end products and end customers.
Job Summary
•Implement design of CMOS memory circuits to meet memory compiler performance, power, and area requirements, including periphery circuits to support functional safety and scan functionality.
•Generate, execute, and evaluate simulation characterization measurements and simulation test benches, and compare vs. performance targets/benchmarks.
•Engage with layout teams on implementation of compiler leaf cells based on designs to improve area and performance.
•Work closely with CAD teams on implementation of new designs into our characterization, verification, and regression flows.
•Align with modeling/verification team to ensure consistency of designs with frontend models (behavioral/ATPG/emulation).
•Collaborate effectively across global memory teams to help ensure common methodologies and best practices.
•Leverage internally supported LLM/GenAI tools and EDA vendor GenAI solutions to implement efficiencies in design methodologies.
Job Qualifications
•Bachelor's degree in Electrical Engineering, Computer Engineering, or related discipline (Master's degree is preferred).
•8+ years of industry experience (6+ with Master's degree) in SRAM memory circuit design, including some design experience with advanced CMOS foundry technologies at 5nm and beyond.
•Strong familiarity with Cadence Virtuoso and other industry-standard EDA tools.
•Familiarity with automotive design rules and memory design requirements is a plus.
•Good knowledge of scripting languages such as Perl, tcl, or Python is a must.
•Creative mindset, with strong analytical and problem-solving skills.
Job Location
The position will be based at the NXP offices in Austin, Texas. Team members are expected to work in office at least 3 days/week.

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