Role Overview
The Semiconductor Packaging Engineer will serve as an experienced technical lead within NXP's Package Innovation organization, defining and delivering package solutions for new products and new technologies across NXP business lines. This role provides standard and advanced packaging solutions to support NXP markets including vehicle electrification and power management, robotics, and high-performance compute/datacenters, with focus on analog and power delivery.
Job Summary
•Define package architectures, materials, structures, and assembly process flows that meet product requirements for reliability, performance, manufacturability, and cost.
•Drive complex cross-functional technical programs involving Marketing, Business Lines, Package Design, Product Engineering, Silicon Design, Simulation, Test, Quality, Reliability, Manufacturing, internal assembly sites, OSATs, material suppliers, and external technology partners.
•Monitor industry trends in advanced packaging, panel-level packaging (PLP), and power packaging. Define and drive associated technology roadmaps.
•Ensure package deliverables are met for New Product Introductions (NPI) and New Technology Introductions (NTI), including feasibility assessment, package design, prototype builds, characterization, qualification, risk retirement, release, and production ramp support.
•May involve international travel to NXP assembly sites, OSATs, suppliers, and technology partners.
Job Qualifications
•B.S. or higher in Mechanical Engineering, Materials Science, Chemical Engineering, Electrical Engineering, or related field.
•10+ years of experience in semiconductor packaging development, package technology, assembly process development, package design, product/package engineering, or related fields.
•Broad working knowledge of IC package families such as QFP, QFN, BGA, FCBGA, FCCSP, WLCSP, FOWLP, FOPLP/PLP, SiP/modules, and power packages.
•Experience leading cross-functional technical projects with contributors from multiple engineering, co-design, manufacturing, product, quality, supplier, and management organizations.
•Ability to communicate technical tradeoffs, risks, recommendations, and project status clearly to both technical and management audiences.
•Fluent English communication skills, written and verbal.
•Deep expertise in one or more advanced packaging areas such as fan-out packaging, panel-level packaging, 2.5D/3D integration, chiplets, heterogeneous integration, embedded die/passives, SiP/modules, high-density substrates/RDL, hybrid bonding, or high power packaging is preferred.
