Ciena

Senior Layout Engineer

In short

Senior Analog Layout Engineer role at Ciena, working on high-speed analog circuits (DAC, ADC, SERDES, transimpedance amplifier, modulator driver) for Wavelogic optical fiber transmission products in deep-submicron CMOS/BiCMOS technologies. Requires 5+ years of custom analog/mixed-signal layout design experience including FinFET devices, and proficiency with industry-standard tools like Cadence Virtuoso, Siemens Calibre, and Ansys Totem. Remote position restricted to candidates in Mexico.

About the Role
Ciena's Wavelogic products advance high-speed optical fiber transmission through integrated analog technologies. This Analog Layout Engineer role contributes to advanced high-speed analog circuits in deep-submicron CMOS and BiCMOS technologies, including DAC, ADC, SERDES, transimpedance amplifier, modulator driver, and precision control and monitoring circuits. The role delivers high-performance analog layouts that enable broadband fiber-optic modem solutions.
How you will make an impact
•Evaluate layout feasibility for circuit designs in collaboration with senior analog designers, considering design trade-offs and team input.
•Create layouts for assigned analog blocks through floor planning, placement, and routing.
•Perform DRC, ANT, LVS, PERC, EM, and IR verification checks to confirm layout quality.
•Investigate layout tool and process features that can enhance productivity.
•Provide regular status updates, participate in team meetings, and share knowledge with the group.
The must haves
•Education: Bachelor's degree in Electrical Engineering or a related field.
•Experience: 5+ years of relevant industry experience.
•Custom analog and mixed-signal layout design using deep-submicron CMOS devices, including FinFET transistors.
•Collaboration within an existing team environment and application of a constructive approach to team activities.
•Communication and interpersonal skills applied in collaboration with cross-functional teams.
•Custom layout design of analog and mixed-signal designs, including ADC, DAC, PLL, and SERDES.
•Utilization of industry-standard layout tools, including Cadence Virtuoso, Siemens Calibre, and Ansys Totem, and application of layout design flows for advanced technology nodes.
Nice to haves
•Scripting using PERL or SKILL.

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